1. Field of the Invention
The present invention relates to a chip structure and a process thereof, and a stacked structure of chips and a process thereof, and particularly to a chip structure having a compliant contact and a process thereof, and a stacked structure of chips and a process thereof.
2. Description of Related Art
In today's information society, users all seek after electronic products with high speed, high quality and multiple functions. In terms of the product exterior appearance, electronic product designs reveal a trend of light weight, thinness and compactness. In order to meet the aforementioned demands, a multi-chip package module has been developed recently. A plurality of chips having different functions or an identical function is packaged altogether on a carrier. The carrier is a substrate or a leadframe and the chips packaged altogether on the carrier are electrically connected with an exterior circuit through the carrier. Therefore, the multi-chip package module has a faster transmission speed, a shorter transmission path and better electric characteristics, and a size and an area of the multi-chip package structure is further reduced. As a result, the multi-chip package technology has been extensively applied in all kinds of electronic products and become the mainstream of future market.
Moreover, m a stacked package structure, the multi-chip package technology is adopted to dispose a plurality of chips or a plurality of passive devices by stacking them on the same carrier. In the prior art, a method of stacking the chips mainly includes manufacturing a micro through hole on the same location in each of the chips, and then filling in a conductive material in the micro through holes by an electroplating process with a high ratio of depth to width. Next, the chips are stacked to connect the micro through holes on the chips so that the chips are electrically turned on among themselves.
Further, another method of stacking includes attaching a substrate having a plurality of electrodes adjacent to multiple layers of stacked chips. The electrodes are electrically turned on among themselves and each of the chips is electrically connected to one of the electrodes respectively so as to achieve electrical turning-on among the chips. Additionally, a method of stacking may further include connecting lines to a side surface and a back surface of the chip, and manufacturing a bump on the back surface of the chip to electrically connect adjacent chips. Still another method of stacking includes connecting lines to a side surface of the chip and completing connection among the lines on the side surface of the stacked chip and electric connection among the chips.